North America University Software Program

Thayer School of Engineering at Dartmouth College is a Cadence University Program Member.

Cadence Tools in Thayer School's Curriculum 

  • In ENGS 63, students learn to use modern computer-aided design (CAD) tools offered by Cadence, which manage the complexity that VLSI entails. Chips designed by students are fabricated by the MOSIS fabrication service.
  • In ENGG 127, VLSI Systems Design, requires a design project in which the student will design, analyze, and optimize a small CMOS circuit. Students use Cadence tools to perform analog circuit simulations to verify digital circuit performance. The Custom IC Design project is then fabricated by the MOSIS service.  
  • ENGS 128, HDL-Based System Design, requires the student to perform circuit simulation, analysis, validation, and synthesis using the industry-standard hardware-description language Verilog as well as other Cadence tools.

Cadence Tools in ECE Research Projects

Prof. Odame's laboratory develops and tests analog integrated circuits for low power applications. The lab uses Cadence tools for circuit design, simulation, and layout.


Mark.J.Franklin@dartmouth.edu is responsible for maintaining this page. 

This page is only about our use of Cadence tools and not any other vendor's tools. Cadence is a registered trademark of Cadence Design Systems, Inc., 2655 Seely Avenue, San Jose, CA 95134.

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